For semiconductor components, it is increasingly end desirable to minimize the size of the product package that is produced. For this purpose, the number of external contacts is reduced to a minimum. It is also desirable to avoid as many external contacts as possible of a semiconductor component, which have previously been provided for test purposes, optimization purposes, and analysis purposes. Such a reduction in the number of external contacts correlates to external contacts for internal test and analysis purposes no longer being provided externally on the package. Although this results in smaller packages, there are also significant restrictions in the suitability of such semiconductor components for analysis and testing. The associated risks with respect to the yield of serviceable semiconductor components from a rewiring substrate strip cannot be lessened by further improved production processes.
Furthermore, the testing of semiconductor components by contacting their remaining external contacts by probe tips presents a further problem. It is not possible to rule out the possibility of external contacts being damaged or deformed by probe tips. Damage or deformation of external contacts can lead to problems when carrying out soldering during further processing. A transfer of soft material of the external contacts to the hardened measuring contacts is not ruled out in this case, and may lead to contamination caused by residues, which can cause problems in testing.
A rewiring strip with a number of semiconductor component positions, which can overcome the above problems, is desirable. Also, in spite of the reduced number of external contacts and reduced package size, a suitability for analysis and testing with respect to internal signals for process optimisation, for correlation with other forms of package, and for characterization of the semiconductor components is desirable. In addition, tests that are possible without damaging or deforming external contacts are desirable. A simple and low-cost way of mechanically and electrically contacting semiconductor components or semiconductor modules of large-scale integrated circuits for a “burn-in” test is desirable.